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Clock and Data Signals
The keyboard and system communicate over the 'clock' and
,data' lines. The source of each of these lines is an
open-collector device on the keyboard that allows either the
keyboard or the system to force a line to an inactive (low) level.
When no communication is occurring, the 'clock' line is at an
active (high) level. The state of the 'data' line is held inactive
(low) by the keyboard.
An inactive signal will have a value of at least 0, but not greater
than +0.7 volts. A signal at the inactive level is a logical
o.
An
active signal will have a value of at least +2.4, but not greater
than
+
5.5 volts. A signal at the active level is a logical 1.
Voltages are measured between a signal source and the dc
network ground.
The keyboard 'clock' line provides the clocking signals used to
clock serial data from the keyboard. If the host system forces the
'clock' line to an inactive level, keyboard transmission is
inhibited.
When the keyboard sends data to the system, it generates the
,clock' signal to time the data. The system can prevent the
keyboard from sending data by forcing the 'clock' line to an
inactive level, or by holding the 'data' line at an inactive level.
During the BAT, the keyboard allows the 'clock' and 'data' lines
to go to an active level.
4-32
lOl/102-Key Keyboard
- Quick Links:
- Section 1. System Board
- 64/256K System Board
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